rts-sim-module/sys/circuit_sys/signal_3xh3.go

111 lines
3.7 KiB
Go
Raw Normal View History

2023-10-08 17:19:50 +08:00
package circuit_sys
import (
"joylink.club/ecs"
2023-10-09 13:23:34 +08:00
"joylink.club/ecs/filter"
2023-10-08 17:19:50 +08:00
"joylink.club/rtsssimulation/component"
)
type Signal3XH3System struct {
query *ecs.Query
}
func NewSignal3XH3System() *Signal3XH3System {
2023-10-12 16:13:56 +08:00
return &Signal3XH3System{query: ecs.NewQuery(filter.Contains(
component.Signal3XH3ElectronicType,
component.Signal3XH3LsqType,
component.Signal3XH3LscType,
component.SignalLightsType))}
2023-10-08 17:19:50 +08:00
}
// Update world 执行
func (s *Signal3XH3System) Update(w ecs.World) {
2023-10-12 15:13:13 +08:00
s.query.Each(w, func(entry *ecs.Entry) {
state := component.Signal3XH3ElectronicType.Get(entry)
lsq := component.Signal3XH3LsqType.Get(entry)
lsc := component.Signal3XH3LscType.Get(entry)
lights := component.SignalLightsType.Get(entry)
Z3XH3_H := lights.GetLightByTag(component.HdTag)
Z3XH3_U := lights.GetLightByTag(component.UdTag)
2023-10-08 17:19:50 +08:00
//
2023-10-12 15:13:13 +08:00
s.calculateLsq(state, lsq)
s.calculateU(state, Z3XH3_U)
s.calculateH(state, Z3XH3_H)
s.calculateDJ(state, Z3XH3_U, Z3XH3_H)
s.calculate2DJ(state, Z3XH3_U)
s.calculateLsc(state, lsc)
2023-10-08 17:19:50 +08:00
})
}
2023-10-12 15:13:13 +08:00
// 联锁驱
func (s *Signal3XH3System) calculateLsq(state *component.Signal3XH3Electronic, lsq *component.Signal3XH3Lsq) {
ddj := component.RelayDriveType.Get(state.Z3XH3_DDJ)
lxj := component.RelayDriveType.Get(state.Z3XH3_LXJ)
yxj := component.RelayDriveType.Get(state.Z3XH3_YXJ)
//
ddjQ := lsq.Z3XH3_DDJ_Q
ddj.Td = ddjQ
ddj.Xq = ddjQ
//
lxjQ := lsq.Z3XH3_LXJ_Q
lxj.Td = lxjQ
lxj.Xq = lxjQ
//
yxjQ := lsq.Z3XH3_YXJ_Q
yxj.Td = yxjQ
yxj.Xq = yxjQ
}
// 联锁采
func (s *Signal3XH3System) calculateLsc(state *component.Signal3XH3Electronic, lsc *component.Signal3XH3Lsc) {
ddj := component.BitStateType.Get(state.Z3XH3_DDJ)
lxj := component.BitStateType.Get(state.Z3XH3_LXJ)
dj := component.BitStateType.Get(state.Z3XH3_DJ)
edj := component.BitStateType.Get(state.Z3XH3_2DJ)
yxj := component.BitStateType.Get(state.Z3XH3_YXJ)
//
lsc.Z3XH3_2DJ_Xq = edj.Val
lsc.Z3XH3_DJ_Xq = dj.Val
lsc.Z3XH3_DDJ_Lx = !ddj.Val
lsc.Z3XH3_LXJ_Xq = lxj.Val
lsc.Z3XH3_YXJ_Xq = yxj.Val
}
func (s *Signal3XH3System) calculateU(state *component.Signal3XH3Electronic, Z3XH3_U *ecs.Entry) {
2023-10-08 17:19:50 +08:00
ddj := component.BitStateType.Get(state.Z3XH3_DDJ)
lxj := component.BitStateType.Get(state.Z3XH3_LXJ)
dj := component.BitStateType.Get(state.Z3XH3_DJ)
yxj := component.BitStateType.Get(state.Z3XH3_YXJ)
2023-10-11 17:44:44 +08:00
isU := !ddj.Val && !lxj.Val && dj.Val && yxj.Val || !ddj.Val && lxj.Val
2023-10-12 15:13:13 +08:00
driveU := component.LightDriveType.Get(Z3XH3_U)
2023-10-11 17:44:44 +08:00
driveU.Td = isU
2023-10-08 17:19:50 +08:00
}
2023-10-12 15:13:13 +08:00
func (s *Signal3XH3System) calculateH(state *component.Signal3XH3Electronic, Z3XH3_H *ecs.Entry) {
2023-10-08 17:19:50 +08:00
ddj := component.BitStateType.Get(state.Z3XH3_DDJ)
lxj := component.BitStateType.Get(state.Z3XH3_LXJ)
2023-10-11 17:44:44 +08:00
isH := !ddj.Val && !lxj.Val
2023-10-12 15:13:13 +08:00
driveH := component.LightDriveType.Get(Z3XH3_H)
2023-10-11 17:44:44 +08:00
driveH.Td = isH
2023-10-08 17:19:50 +08:00
}
2023-10-12 15:13:13 +08:00
func (s *Signal3XH3System) calculateDJ(state *component.Signal3XH3Electronic, Z3XH3_U *ecs.Entry, Z3XH3_H *ecs.Entry) {
2023-10-08 17:19:50 +08:00
ddj := component.BitStateType.Get(state.Z3XH3_DDJ)
lxj := component.BitStateType.Get(state.Z3XH3_LXJ)
2023-10-12 15:13:13 +08:00
ud := component.BitStateType.Get(Z3XH3_U)
hd := component.BitStateType.Get(Z3XH3_H)
2023-10-11 17:44:44 +08:00
isDJ := ud.Val && !ddj.Val && lxj.Val || hd.Val && !ddj.Val && !lxj.Val
drive := component.RelayDriveType.Get(state.Z3XH3_DJ)
drive.Td = isDJ
drive.Xq = isDJ
2023-10-08 17:19:50 +08:00
}
2023-10-12 15:13:13 +08:00
func (s *Signal3XH3System) calculate2DJ(state *component.Signal3XH3Electronic, Z3XH3_U *ecs.Entry) {
2023-10-08 17:19:50 +08:00
ddj := component.BitStateType.Get(state.Z3XH3_DDJ)
lxj := component.BitStateType.Get(state.Z3XH3_LXJ)
dj := component.BitStateType.Get(state.Z3XH3_DJ)
yxj := component.BitStateType.Get(state.Z3XH3_YXJ)
2023-10-12 15:13:13 +08:00
ud := component.BitStateType.Get(Z3XH3_U)
2023-10-11 17:44:44 +08:00
is2DJ := ud.Val && !ddj.Val && !lxj.Val && dj.Val && yxj.Val
drive := component.RelayDriveType.Get(state.Z3XH3_2DJ)
drive.Td = is2DJ
drive.Xq = is2DJ
2023-10-08 17:19:50 +08:00
}